[CPU] Convolution fixes combined (#30890)

Includes:
- #30870
- #30875
- #30872
- #30871

---------

Co-authored-by: Maksim Kutakov <maksim.kutakov@intel.com>

Author: EgorDuplensky

src/plugins/intel_cpu/src/nodes/executors/convolution_config.hpp

@@ -20,16 +20,16 @@ struct ConvAttrs {
     std::vector<size_t> dilation;
     std::vector<ptrdiff_t> paddingL;
     std::vector<ptrdiff_t> paddingR;
-    AutoPaddingType autoPadding;
+    AutoPaddingType autoPadding = AutoPaddingType::None;
 
-    bool withBias;
-    bool weightsNonTransposed;
-    bool isGrouped;
+    bool withBias = false;
+    bool weightsNonTransposed = false;
+    bool isGrouped = false;
     // @todo can we just check for port precisions instead?
-    bool isGraphQuantized;
-    bool fcSemantic;
-    bool nonConstantWeights;
-    ZeroPointsType inputZeroPointsType;
+    bool isGraphQuantized = false;
+    bool fcSemantic = false;
+    bool nonConstantWeights = false;
+    ZeroPointsType inputZeroPointsType = ZeroPointsType::None;
     std::vector<float> dqScales;
 
     PostOps postOps;

src/plugins/intel_cpu/src/nodes/executors/convolution_implementations.cpp

@@ -4,6 +4,8 @@
 
 #include <vector>
 
+#include "cpu/x64/cpu_isa_traits.hpp"
+#include "memory_desc/cpu_memory_desc.h"
 #include "memory_desc/dnnl_blocked_memory_desc.h"
 #include "memory_format_filter.hpp"
 #include "nodes/executors/convolution_config.hpp"
@@ -63,6 +65,11 @@ template <typename PostOpType>
     });
 }
 
+[[maybe_unused]] static inline bool isQuantized(const ConvConfig& config) {
+    return one_of(config.descs.at(ARG_SRC)->getPrecision(), ov::element::u8, ov::element::i8) &&
+           config.descs.at(ARG_WEI)->getPrecision() == ov::element::i8;
+};
+
 template <typename Attrs>
 bool MatchesMemoryFormatFilter(const executor::Config<Attrs>& config,
                                const LayoutConfig& layoutConfig,
@@ -113,7 +120,7 @@ const std::vector<ExecutorImplementation<ConvAttrs>>& getImplementations() {
                 }
 
                 VERIFY(!hasPostOp<DepthwiseConvolutionPostOp>(config), UNSUPPORTED_POST_OPS);
-                VERIFY(DnnlConvolutionPrimitive::isBrgConvAvailable(config), "brgemm convolution is not available");
+                VERIFY(isQuantized(config) || DnnlConvolutionPrimitive::isBrgConvAvailable(config), "is not quantized or brgemm convolution is not available");
 
                 return true;
             },
@@ -131,6 +138,7 @@ const std::vector<ExecutorImplementation<ConvAttrs>>& getImplementations() {
                 }
 
                 // fork kernel with dw conv post ops supports only src: (ncsp | nCsp8c), dst: nCsp8c
+                VERIFY(!isQuantized(config), UNSUPPORTED_SRC_PRECISIONS);
                 VERIFY(!hasPostOp<DepthwiseConvolutionPostOp>(config), UNSUPPORTED_POST_OPS);
                 const auto [groupNum, groupIC, IC, groupOC] = DnnlConvolutionPrimitive::getChannelParams(config);
 
@@ -144,12 +152,15 @@ const std::vector<ExecutorImplementation<ConvAttrs>>& getImplementations() {
             "convolution_dnnl_ncsp_nCsp16c", ExecutorType::Dnnl, OperationType::Convolution,  ShapeTolerance::Agnostic,
             // supports
             [](const ConvConfig& config, const MemoryFormatFilter& memoryFormatFilter) -> bool {
+                VERIFY(dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core), UNSUPPORTED_ISA);
+
                 if (!MatchesMemoryFormatFilter(config, LayoutConfig{LayoutType::ncsp, LayoutType::ncsp, LayoutType::nCsp16c, LayoutType::nCsp16c},
                                                memoryFormatFilter)) {
                     return false;
                 }
 
                 // fork kernel with dw conv post ops supports only src: (ncsp | nCsp8c), dst: nCsp8c
+                VERIFY(!isQuantized(config), UNSUPPORTED_SRC_PRECISIONS);
                 VERIFY(!hasPostOp<DepthwiseConvolutionPostOp>(config), UNSUPPORTED_POST_OPS);
 
                 const auto [groupNum, groupIC, IC, groupOC] = DnnlConvolutionPrimitive::getChannelParams(config);
@@ -169,6 +180,7 @@ const std::vector<ExecutorImplementation<ConvAttrs>>& getImplementations() {
                     return false;
                 }
 
+                VERIFY(!isQuantized(config), UNSUPPORTED_SRC_PRECISIONS);
                 const auto [groupNum, groupIC, IC, groupOC] = DnnlConvolutionPrimitive::getChannelParams(config);
 
                 return IC < 4 && groupOC != 1;
@@ -181,12 +193,15 @@ const std::vector<ExecutorImplementation<ConvAttrs>>& getImplementations() {
             "convolution_dnnl_nCsp16c_nCsp16c", ExecutorType::Dnnl, OperationType::Convolution,  ShapeTolerance::Agnostic,
             // supports
             [](const ConvConfig& config, const MemoryFormatFilter& memoryFormatFilter) -> bool {
+                VERIFY(dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core), UNSUPPORTED_ISA);
+
                 if (!MatchesMemoryFormatFilter(config, LayoutConfig{LayoutType::nCsp16c, LayoutType::ncsp, LayoutType::nCsp16c, LayoutType::nCsp16c},
                                                memoryFormatFilter)) {
                     return false;
                 }
 
                 // fork kernel with dw conv post ops supports only src: (ncsp | nCsp8c), dst: nCsp8c
+                VERIFY(!isQuantized(config), UNSUPPORTED_SRC_PRECISIONS);
                 VERIFY(!hasPostOp<DepthwiseConvolutionPostOp>(config), UNSUPPORTED_POST_OPS);
 
                 const auto [groupNum, groupIC, IC, groupOC] = DnnlConvolutionPrimitive::getChannelParams(config);
@@ -206,6 +221,7 @@ const std::vector<ExecutorImplementation<ConvAttrs>>& getImplementations() {
                     return false;
                 }
 
+                VERIFY(!isQuantized(config), UNSUPPORTED_SRC_PRECISIONS);
                 const auto [groupNum, groupIC, IC, groupOC] = DnnlConvolutionPrimitive::getChannelParams(config);
 
                 return IC > 4;
@@ -223,6 +239,7 @@ const std::vector<ExecutorImplementation<ConvAttrs>>& getImplementations() {
                     return false;
                 }
 
+                VERIFY(!isQuantized(config), UNSUPPORTED_SRC_PRECISIONS);
                 // fork kernel with dw conv post ops supports only src: (ncsp | nCsp8c), dst: nCsp8c
                 VERIFY(!hasPostOp<DepthwiseConvolutionPostOp>(config), UNSUPPORTED_POST_OPS);
 
@@ -241,6 +258,8 @@ const std::vector<ExecutorImplementation<ConvAttrs>>& getImplementations() {
                     return false;
                 }
 
+                VERIFY(!isQuantized(config), UNSUPPORTED_SRC_PRECISIONS);
+
                 return !one_of(srcType(config), ov::element::bf16, ov::element::f16) && DnnlConvolutionPrimitive::isNspcAvailable(config);
             },
             RequiresFallbackDefault{{LayoutType::nspc, LayoutType::ncsp, LayoutType::nspc, LayoutType::nspc}},

src/plugins/intel_cpu/src/nodes/executors/debug_messages.hpp

@@ -20,6 +20,7 @@
 #define HEURISTICS_MISMATCH                  " heuristics mismatch"
 #define UNSUPPORTED_PER_CHANNEL_QUANTIZATION " unsupported per-channel quantization"
 
+// @todo implement VERIFY_OR version to support multiple conditions and error messages
 #define VERIFY(condition, ...)      \
     do {                            \
         if (!(condition)) {         \

src/plugins/intel_cpu/src/nodes/executors/dnnl/dnnl_convolution_primitive.cpp

@@ -282,27 +282,33 @@ static std::tuple<primitive_desc, size_t> selectPrimitiveDescWithMultipleAttribu
     };
 
     PrimitiveDescWithPriority prim_desc_w_priority{dnnl::primitive_desc(), 0, implPriorities.size()};
+    const bool first_match = implPriorities.front() == impl_desc_type::unknown;
 
     // try all the provided attributes and select the one which results in a primitive desc with the highest priority
     for (size_t attrId = 0; attrId < attrs.size(); attrId++) {
         const auto& attr = attrs[attrId];
 
-        for (size_t priorityId = 0; priorityId < implPriorities.size(); priorityId++) {
-            const auto preferredImplType = implPriorities[priorityId];
-            // the only way to fully reset primitive_desc after iterating over the implementations is to re-create it
-            auto cur_desc = createPrimitiveDescriptor(attr);
-            const bool found = DnnlExtensionUtils::find_implementation(cur_desc, preferredImplType);
-
-            const size_t highestPriority = prim_desc_w_priority.priority;
-            if (found && priorityId < highestPriority) {
-                prim_desc_w_priority = {cur_desc, attrId, priorityId};
-            }
-        }
-    }
-
-    auto prim_desc = prim_desc_w_priority.prim_desc;
-
-    return {prim_desc, prim_desc_w_priority.attrId};
+        auto cur_desc = createPrimitiveDescriptor(attr);
+
+        DnnlExtensionUtils::for_each_implementation(
+            cur_desc,
+            first_match,
+            [&](impl_desc_type implType) {  // is acceptable implementation
+                return contains(implPriorities, implType);
+            },
+            [&](dnnl::primitive_desc& desc) {  // is implementation with highest priority
+                const impl_desc_type descImplType = parse_impl_name(desc.impl_info_str());
+                const auto it = std::find(implPriorities.begin(), implPriorities.end(), descImplType);
+                const size_t priorityId = std::distance(implPriorities.begin(), it);
+                const size_t highestPriority = prim_desc_w_priority.priority;
+                if (priorityId < highestPriority) {
+                    auto desc_copy = dnnl::primitive_desc(DnnlExtensionUtils::clone_primitive_desc(desc.get(true)));
+                    prim_desc_w_priority = {desc_copy, attrId, priorityId};
+                }
+            });
+    }
+
+    return {prim_desc_w_priority.prim_desc, prim_desc_w_priority.attrId};
 }
 
 static primitive_desc createPrimitiveDesc(const dnnl::memory::desc& inputDesc,
@@ -881,7 +887,7 @@ bool DnnlConvolutionPrimitive::isJitPlanarAvailable(const ConvConfig& config) {
     const bool isAvx2FP32 = !dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core) &&
                             dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx2) && !config.attrs.isGraphQuantized;
 
-    const auto [groupNum, groupIC, groupOC, IC] = getChannelParams(config);
+    const auto [groupNum, groupIC, IC, groupOC] = getChannelParams(config);
 
     return (IC == 1 && groupOC * groupNum == 1) && isAvx2FP32;
 }
@@ -919,12 +925,7 @@ bool DnnlConvolutionPrimitive::isNspcAvailable(const ConvConfig& config) {
     auto outDims = config.descs.at(ARG_DST)->getShape().getDims();
     auto ndims = inpDims.size();
 
-    size_t groupNum;
-    size_t groupIC;
-    size_t groupOC;
-    size_t IC;
-
-    std::tie(groupNum, groupIC, groupOC, IC) = getChannelParams(config);
+    const auto [groupNum, groupIC, IC, groupOC] = getChannelParams(config);
 
     bool isDepthWise = config.attrs.isGrouped && 1 == groupOC && 1 == groupIC;
 

src/plugins/intel_cpu/src/nodes/executors/fullyconnected_config.hpp

@@ -16,7 +16,7 @@ struct FCAttrs {
     bool withBias = false;
     bool weightsNonTransposed = false;
     bool sparseWeights = false;
-    uint64_t dynamicQuantizationGroupSize;
+    uint64_t dynamicQuantizationGroupSize = 0;
     bool nonConstantWeights = false;
 
     ov::intel_cpu::Config::ModelType modelType = ov::intel_cpu::Config::ModelType::Unknown;

src/plugins/intel_cpu/tests/functional/custom/subgraph_tests/src/x64/conv_u8s8f32.cpp

@@ -0,0 +1,112 @@
+// Copyright (C) 2025 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#include <memory>
+
+#include "common_test_utils/node_builders/fake_quantize.hpp"
+#include "openvino/core/type/element_type.hpp"
+#include "openvino/op/constant.hpp"
+#include "openvino/op/convolution.hpp"
+#include "shared_test_classes/base/ov_subgraph.hpp"
+#include "utils/cpu_test_utils.hpp"
+#include "utils/filter_cpu_info.hpp"
+#include "utils/fusing_test_utils.hpp"
+
+using namespace CPUTestUtils;
+
+namespace ov {
+namespace test {
+
+/* Verify simple quantized convolution subgraph.
+   No reference implementations are expected to be used.
+
+       Param1
+         |
+       FQ_U8
+         |
+       Conv1
+         |
+       PreLU
+         |
+      Result
+
+*/
+
+typedef std::tuple<CPUSpecificParams, fusingSpecificParams> ConvU8I8FP32Params;
+
+class ConvU8I8FP32 : public testing::WithParamInterface<ConvU8I8FP32Params>,
+                     virtual public SubgraphBaseStaticTest,
+                     public CpuTestWithFusing {
+public:
+    static std::string getTestCaseName(const testing::TestParamInfo<ConvU8I8FP32Params>& obj) {
+        CPUSpecificParams cpuParams;
+        fusingSpecificParams fusingParams;
+        std::tie(cpuParams, fusingParams) = obj.param;
+
+        std::ostringstream result;
+        result << "CPU_";
+        result << CPUTestsBase::getTestCaseName(cpuParams);
+        result << CpuTestWithFusing::getTestCaseName(fusingParams);
+        return result.str();
+    }
+
+    void SetUp() override {
+        const auto& [cpuParams, fusingParams] = this->GetParam();
+
+        std::tie(inFmts, outFmts, priority, selectedType) = cpuParams;
+        std::tie(postOpMgrPtr, fusedOps) = fusingParams;
+
+        ov::element::Type netPrecision = ov::element::f32;
+
+        targetDevice = ov::test::utils::DEVICE_CPU;
+
+        auto make_i8_fake_quantize = [&](std::shared_ptr<ov::Node> input, ov::element::Type dataType) {
+            return ov::test::utils::make_fake_quantize(input, dataType, 256, {}, {-1.28f}, {1.27f}, {-1.28f}, {1.27f});
+        };
+
+        auto make_u8_fake_quantize = [&](std::shared_ptr<ov::Node> input, ov::element::Type dataType) {
+            return ov::test::utils::make_fake_quantize(input, dataType, 256, {}, {0.0f}, {2.55f}, {0.0f}, {2.55f});
+        };
+
+        auto make_quantized_weights = [&make_i8_fake_quantize](const Shape& shape, ov::element::Type dataType) {
+            auto weights = ov::op::v0::Constant::create(dataType, shape, std::vector<float>{-0.0512377955019474});
+            return make_i8_fake_quantize(weights, dataType);
+        };
+
+        ov::ParameterVector params{std::make_shared<ov::op::v0::Parameter>(netPrecision, ov::Shape{1, 3, 8, 8})};
+
+        auto fq_input = make_u8_fake_quantize(params[0], netPrecision);
+        auto fq_weights = make_quantized_weights({3, 3, 4, 4}, netPrecision);
+
+        auto conv = std::make_shared<ov::op::v1::Convolution>(fq_input,
+                                                              fq_weights,
+                                                              Strides{1, 1},
+                                                              CoordinateDiff{0, 0},
+                                                              CoordinateDiff{0, 0},
+                                                              Strides{1, 1},
+                                                              ov::op::PadType::SAME_UPPER);
+
+        auto result = std::make_shared<ov::op::v0::Result>(conv);
+
+        function = makeNgraphFunction(netPrecision, params, conv, "Convolution");
+    }
+};
+
+TEST_P(ConvU8I8FP32, smoke_CompareWithRefs) {
+    run();
+    CheckPluginRelatedResults(compiledModel, "Convolution");
+}
+
+INSTANTIATE_TEST_SUITE_P(
+    smoke_Conv,
+    ConvU8I8FP32,
+    ::testing::Combine(::testing::ValuesIn(filterCPUInfo(
+                           {CPUSpecificParams{{}, {}, {"jit_sse42"}, {"jit_sse42_I8"}},  // verify i8 SSE42 just in case
+                            CPUSpecificParams{{}, {}, {"jit_avx2"}, {"jit_avx2_I8"}},
+                            CPUSpecificParams{{}, {}, {"brgconv_avx512"}, {"brgconv_avx512_I8"}}})),
+                       ::testing::Values(fusingPReluPerTensor)),
+    ConvU8I8FP32::getTestCaseName);
+
+}  // namespace test
+}  // namespace ov