Skip to content

Conversation

charles-zablit
Copy link

…ime [NFC] (llvm#154906)

Extract ManualCodegen blocks from riscv_vector.td to dedicated helper
functions in RISCV.cpp to improve compilation times and code
organization.

This refactoring:
- Reduces riscv_vector_builtin_cg.inc from ~70,000 lines to ~30,000
lines
- Extracts lots of ManualCodegen blocks into helper functions in
RISCV.cpp
- Moves complex code generation logic from TableGen to C++
- Marks extracted functions with LLVM_ATTRIBUTE_NOINLINE to prevent
excessive inlining in EmitRISCVBuiltinExpr's large switch statement,
which would cause compilation time to increase significantly

Performance Impact on AMD Ryzen 9 3950X 16-Core with SSD (Release build)
with GCC 11:

Before: real 1m4.560s, user 0m0.529s, sys 0m0.175s
After:  real 0m22.577s, user 0m0.498s, sys 0m0.152s

Which reduced around 65% of compilation time.

During this refactoring, I also found few more opportunities to optimize
and simplify the code generation logic, but I think leave to next PR
since it already change a lot of code.

Fix llvm#88368
@charles-zablit charles-zablit changed the title [RISCV] Refactor RVV builtin code generation for reduce compilation time [NFC] (#154906) 🍒 [RISCV] Refactor RVV builtin code generation for reduce compilation time [NFC] (#154906) Sep 12, 2025
@charles-zablit charles-zablit self-assigned this Sep 12, 2025
@charles-zablit
Copy link
Author

This fixes llvm#88368, which we encounter on rebranch as well when building the toolchain on ARM64 Windows.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants