Design and implementation of a 16-bit CPU in Logisim, featuring a custom datapath, ALU, memory operations, branching, and exception handling. Created for the "Computer Systems & Architecture" 1st bachelor course at the University of Antwerp.
SUTD ISTD 2020 Computation Structures Electronic Hardware 1D Project
Datapath and Control for a Turing Complete ISA with Interrupt Handling
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